Today, an increased number of IPs are delivered using IP-XACT interfaces which should ease the integration process. However, it is still a complex format to handle and not every company (or designer) wants to jump into a new format.

We observe several categories of users and reactions around IP-XACT:

  • Those who are already using IP-XACT but would like to have the design information fully compliant with an RTL design flow
  • Those who want to adopt this standard with full compliance with RTL design flow but are a bit reluctant knowing the format complexity.
  • Those who want to avoid using IP-XACT as much as possible


Defacto’s SoC Compiler addresses users above and helps building a unified and IP-XACT and RTL design flow. During this webinar Defacto's SoC Compiler 9.0 key capabilities will be illustrated through typical cases such as:

  • Extraction of design information
  • Coherency checks between IP-XACT, RTL, UPF and SDC
  • IP-XACT <-> RTL view generation
  • Joint IP-XACT & RTL Integration
  • System-level handling and report with a focus on memory map.



In summary during the webinar, attendees will get a clear picture of how SoC Compiler helps to build a cost-effectively and robust flow to manage IP-XACT complexity.


AUDIENCE: CAD Manager, Architects, CAD Engineer, Designers, Integration teams and Verification teams



  • Chouki Aktouf: CTO at Defacto
  • Arthur Kalsing: Senior R&D at Defacto & Member of Accellera Working Group
  • Valentin Boyer: Product Manager at Defacto  



This webinar is in partnership with SemiWiki and Defacto