There is no doubt that cost control allows chip design companies to seize new market opportunities by designing less expensive systems-on-chip and electronic systems. Today, the typical SoC design project might have an average cost of €50 million. Such a project can involve the efforts of tens to even hundreds of engineers, with an average project design time of nine to 12 months. Costly design resources are usually required: design automation tools and libraries, third-party intellectual-property cores, and server farms for data processing.


Along with cost reduction, predictability is a key factor in the success of a design project. Any failure during the project monitoring in terms of reactivity, temporary unavailability of any of the planned resources, or even a corrective action can delay a project’s completion and drive up its cost. The financial impact can be significant, especially in correlation with tight tape-out schedules. Thus, more than ever before, design resource management is a key success factor.

But there’s another, equally critical component to the increased focus on design resource management: the need to adopt more environmentally responsible design practices.

The rapid increase in chip production is responsible for considerable environmental effects, including the environmental impacts of the different design phases. Hence, the ecological dimension of a chip design is becoming strategic. The association of eco-design metrics with traditional power/performance/area design metrics is no longer optional for next-generation integrated circuits.

Despite the growing pressure among stakeholders to control the environmental effects of chip design, no standards or international agreements to formalize these mitigation efforts have yet been established. Nevertheless, in line with ISO environmental recommendations, eco-design in the microelectronics industry must consider the impact of the full life cycle and adopt a systematic approach to design, especially for complex SoCs.

Aspects of a project’s eco-design footprint

Containing the impact on climate change is a key factor of design resource management, with reduced energy consumption for integrated circuits expected, especially for those with average to large production volumes. During the chip design process, computing servers are used that have a high calculation capacity and significant power consumption of several megawatts per design flow execution. Each tool used for design, verification, or simulation might need to be used for several days, with a significant impact on power consumption. Further, a high number of tasks — up to 20% — can fail without yielding any convincing results. Climate-change mitigation requires the use of all possible means to avoid wasting energy, especially on tasks that may prove useless.

Modern design tools need to extract dedicated footprint metrics that factor in the ecological impact of SoC design projects and the related jobs performed during chip design cycles, especially those tasks that are high consumers of power and other resources. This should be part of a dedicated SoC design planning step.

Unified management of design projects and resource requirements

Beyond eco-design requirements, design resources in general need to be considered as part of the management of an SoC design project. Traditional management solutions are no longer adaptable to meet today’s cost reduction challenges. The various design entities involved in a design project must be considered as a whole.

Design entities can include a project; a design stream; design data; or a design resource, such as a server or a license for design software. The design process for a complex SoC requires unified project management, with strong links among the entities involved. Such a management process allows full traceability of the use of design resources.

With a global view of the design tasks and the attendant resource requirements, design decisions can be made based on resource availability, yielding more predictable project outcomes. Such visibility opens new options for design and resource allocation and scheduling, with the ability to modify the list of design tasks, shifting or canceling unnecessary ones. Managers are able to order design tasks based on resource availability and to define the priorities for each task. Design managers and decision-makers can focus design teams on those tasks related to higher-priority and strategic projects.

In summary, to address current resource management challenges during the SoC design process, modern project management methodologies are required that enable design entities to jointly manage design projects and required resources. Beyond cost, eco-design is a dimension of SoC design that EDA tools can no longer ignore.