The exceptional success of 2013 has confirmed the company's position as an emerging leader in the front-end design space. The adoption of the STAR platform by key US semiconductor companies has been nothing short of exceptional. With STAR, RTL designers and SoC integration teams are benefiting from the flexibility of EDA tools with unique custom capabilities. STAR combines three key features in one solution:
- Exploration of complex RTL designs
- Creation of new RTL and generation of fully readable and synthesizable code
- Verification without simulation of complex structures at either RTL or gate-level
Also, with the rich number of the API's (Tcl, Perl and Java) and RTL languages (Verilog, System Verilog and VHDL) supported, the adoption cycle of STAR is extremely short as stated by several users.
